SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 862

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SAM9G25

Manufacturer Part Number
SAM9G25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G25

Flash (kbytes)
0 Kbytes
Pin Count
247
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 39-50. Slave Node Configuration, NACT = IGNORE
39.7.8.16
862
862
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
Read
Read
SAM9G25
SAM9G25
LIN Frame Handling With The DMAC
Break
The USART can be used in association with the DMAC in order to transfer data directly into/from
the on- and off-chip memories without any processor intervention.
The DMAC uses the trigger flags, TXRDY and RXRDY, to write or read into the USART. The
DMAC always writes in the Transmit Holding register (US_THR) and it always reads in the
Receive Holding register (US_RHR). The size of the data written or read by the DMAC in the
USART is always a byte.
Synch
Protected
Identifier
Data 1
Data N-1
Data N
Checksum
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11

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