SAM7X256 Atmel Corporation, SAM7X256 Datasheet - Page 462

• Manufacturer Part Number: SAM7X256
• Manufacturer: Atmel Corporation

Specifications of SAM7X256

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

34.5.2.5
34.5.2.6
462
Endpoints Without Dual-Banks
Endpoints With Dual-Banks
SAM7X512/256/128
Transmit Data Cancellation
Reset the endpoint to clear the FIFO (pointers). (See,
Some endpoints have dual-banks whereas some endpoints have only one bank. The procedure
to cancel transmission data held in these banks is described below.
To see the organization of dual-bank availablity refer to
There are two possibilities: In one case, TXPKTRDY field in UDP_CSR has already been set. In
the other instance, TXPKTRDY is not set.
There are two possibilities: In one case, TXPKTRDY field in UDP_CSR has already been set. In
the other instance, TXPKTRDY is not set.
• TXPKTRDY is not set:
• TXPKTRDY has already been set:
• TXPKTRDY is not set:
• TXPKTRDY has already been set:
– Reset the endpoint to clear the FIFO (pointers). (See,
– Clear TXPKTRDY so that no packet is ready to be sent
– Reset the endpoint to clear the FIFO (pointers). (See,
– Reset the endpoint to clear the FIFO (pointers). (See,
– Clear TXPKTRDY and read it back until actually read at 0.
– Set TXPKTRDY and read it back until actually read at 1.
– Clear TXPKTRDY so that no packet is ready to be sent.
Endpoint
Endpoint
Endpoint
Register”.)
Register”.)
Register”.)
Section 34.6.9 ”UDP Reset Endpoint
Table 34-1 ”USB Endpoint
Section 34.6.9 ”UDP Reset
Section 34.6.9 ”UDP Reset
Section 34.6.9 ”UDP Reset
6120I–ATARM–06-Apr-11
Register”.)
Description”.