SAM7X256 Atmel Corporation, SAM7X256 Datasheet - Page 151

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SAM7X256

Manufacturer Part Number
SAM7X256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7X256

Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
23. Advanced Interrupt Controller (AIC)
23.1
23.2
6120I–ATARM–06-Apr-11
Overview
Block Diagram
The Advanced Interrupt Controller (AIC) is an 8-level priority, individually maskable, vectored
interrupt controller, providing handling of up to thirty-two interrupt sources. It is designed to sub-
stantially reduce the software and real-time overhead in handling internal and external
interrupts.
The AIC drives the nFIQ (fast interrupt request) and the nIRQ (standard interrupt request) inputs
of an ARM processor. Inputs of the AIC are either internal peripheral interrupts or external inter-
rupts coming from the product's pins.
The 8-level Priority Controller allows the user to define the priority for each interrupt source, thus
permitting higher priority interrupts to be serviced even if a lower priority interrupt is being
treated.
Internal interrupt sources can be programmed to be level sensitive or edge triggered. External
interrupt sources can be programmed to be positive-edge or negative-edge triggered or high-
level or low-level sensitive.
The fast forcing feature redirects any internal or external interrupt source to provide a fast inter-
rupt rather than a normal interrupt.
Figure 23-1. Block Diagram
Embedded
PeripheralEE
Embedded
Peripheral
Embedded
Peripheral
IRQ0-IRQn
FIQ
Thirty-two
Sources
Up to
AIC
APB
SAM7X512/256/128
nIRQ
nFIQ
Processor
ARM
151

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