SAM7X256 Atmel Corporation, SAM7X256 Datasheet - Page 461

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SAM7X256

Manufacturer Part Number
SAM7X256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7X256

Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
6120I–ATARM–06-Apr-11
When a setup transaction is received after a stall handshake, STALLSENT must be cleared in
order to prevent interrupts due to STALLSENT being set.
Figure 34-12. Stall Handshake (Data IN Transfer)
Figure 34-13. Stall Handshake (Data OUT Transfer)
3. The microcontroller is notified that the device has sent the stall by polling the
USB Bus
Packets
FORCESTALL
STALLSENT
USB Bus
Packets
FORCESTALL
STALLSENT
STALLSENT to be set. An endpoint interrupt is pending while STALLSENT is set. The
microcontroller must clear STALLSENT to clear the interrupt.
Data OUT PID
Data IN
PID
Set by USB Device
Data OUT
Stall PID
Set by Firmware
Stall PID
Set by Firmware
Interrupt Pending
Interrupt Pending
SAM7X512/256/128
Set by
USB Device
Cleared by Firmware
Cleared by Firmware
Cleared by Firmware
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