PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 282

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
Figure 75
Table 23
No. Parameter
60a clock to valid address delay
60b clock to invalid address delay
61a clock to active ADS delay
61b clock to inactive ADS delay
62a clock to active RD / WR delay
62b clock to inactive RD / WR delay
63
64
65a active WR to valid data delay
65b inactive WR to invalid data delay
66
67
Data Sheet
D(15:8)
BGACK
READY
A(23:0)
D(7:0)
BHE
ADS
W/R
CLK
(1) Signals BHE and D(15:8) only available in 16-bit Infineon/Intel bus mode
WR
valid data to inactive RD setup time
inactive RD to invalid data hold time
active READY to clock setup time
clock to inactive READY hold time
1)
1)
68a
68a
68a
68a
68a
68a
Infineon/Intel Write Cycle Timing (Master Access)
Infineon/Intel Bus Interface Timing (Master Access)
61a
60a
65a
T1
61b
62a
66
T2
62b
282
67
65b
T1
min.
5
5
5
5
Electrical Characteristics
Limit Values
T2
max.
22
15
20
20
22
15
20
20
60b
PEB 20542
PEF 20542
2000-09-14
68b
68b
68b
68b
68b
68b
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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