PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 180

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
Data Sheet
Register 28
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
TOIE
TOLEN(6:0) Time Out Length
Bit
H
A
B
TOIE
7
0
0
Time Out Indication Enable
If this bit is set to ’1’ in ASYNC mode, any time out event will
automatically generate an ’RFRD’ command thus inserting a ’block end’
indication into the RFIFO. This time-out condition is indicated with the
’TIME’ interrupt (if unmasked).
TOIE = ’0’
TOIE = ’1’
This bit field determines the time out period. If there is no receive line
activity for the configured period of time, a time out indication is
generated if enabled via bit ’TOIE’.
The period of time is programmable in multiples of character frame
length <CFL> time equivalents including start, parity and stop bits (refer
to
TOLEN
Figure
TOLEN
Time Out Length Register
6
0
0
read/write
00
Channel A
1F
written by CPU; read and evaluated by SEROCCO-D
H
H
49):
Automatic Time Out processing disabled.
Automatic Time Out processing enabled.
T = ((TOLEN + 1) * 4) * <CFL>
5
0
0
Channel B
6F
H
Time Out Length
5-180
4
0
0
TOLEN(6:0)
3
0
0
Register Description (TOLEN)
2
0
0
1
0
0
(async mode)
(async mode)
PEB 20542
PEF 20542
2000-09-14
0
0
0

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