PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 167

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

Data Sheet
SLEN
BISNC
MCS
EPT
SYNC Character Length
This bit selects the SYNC character length in BISYNC/MONOSYNC
operation mode:
SLEN = ’0’
SLEN = ’1’
Select MONOSYNC/BISYNC Mode
This bit selects BISYNC or MONOSYNC operation mode:
BISNC = ’0’
BISNC = ’1’
Modulo Count Select
This bit is valid in HDLC Automode operation only and determines the
control field format:
MCS = ’0’
MCS = ’1’
Enable Preamble Transmission
This bit enables preamble transmission. The preamble is started after
interframe time fill (ITF) transmission is stopped because a new frame is
ready to be transmitted. The preamble pattern consists of 8 bits defined
in register PREAMB, which is sent repetitively. The number of repetitions
is determined by bit field ’PRE(1:0)’:
EPT=’0’
EPT=’1’
Note: Preamble operation does NOT influence HDLC shared flag
transmission if enabled.
6 bit (MONOSYNC), 12 bit (BISYNC).
8 bit (MONOSYNC), 16 bit (BISYNC).
MONOSYNC mode.
BISYNC mode.
Basic operation, one byte control field (modulo 8 counter
operation).
Extended operation, two bytes control field (modulo 128
counter operation).
Preamble transmission is disabled.
Preamble transmission is enabled.
5-167
Register Description (CCR2H)
(hdlc/bisync mode)
(bisync mode)
(bisync mode)
(hdlc modes)
PEB 20542
PEF 20542
2000-09-14