PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 135

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

Data Sheet
Register 7
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
GPnIM
Bit
7
1
GPP Pin n Interrupt Mask
This bit controls the interrupt mask of the corresponding GPP pin:
bit = ’0’
bit = ’1’
GPIM
GPP Interrupt Mask Register
6
1
read/write
FF
09
written by CPU, evaluated by SEROCCO-D
H
H
Interrupt generation is enabled. An interrupt is generated
on any state transition of the corresponding port pin
(inputs).
Interrupt generation is disabled (reset value).
5
1
GPP Interrupt Mask Bits
5-135
4
1
3
1
Register Description (GPIM)
GP2IM
2
GP1IM
1
PEB 20542
PEF 20542
2000-09-14
GP0IM
0
(-)