PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 244

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
Data Sheet
XBC1
(11:0)
XME
XF
XIF
Primary Transmit Byte Count
Only valid in internal DMA controller modes.
This bit field determines the size in number of bytes of the primary
transmit buffer (with base address TBADDR1(23:0)).
• If single-buffer operation is selected, the primary buffer is the only one
• If switched-buffer operation is selected (refer to register DMODE),
Transmit Message End Command
Only valid in internal DMA controller mode.
This bit is identical to ’XME’ command bit (refer to register
Page
Transmit Frame Command
Only valid in internal DMA controller mode.
This bit is identical to ’XF’ command bit (refer to register
Page
Transmit I-Frame Command
Only valid in internal DMA controller mode.
This bit is identical to ’XIF’ command bit (refer to register
Page
used; the secondary transmit byte count bit field XBC2(11:0) is "don’t
care" in this case.
transmission takes place based on two transmit buffers (primary and
secondary) that are sent alternating.
150).
150).
150).
244
Register Description
“CMDRL” on
“CMDRL” on
“CMDRL” on
PEB 20542
PEF 20542
2000-09-14

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