PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 264

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

• If a transmit packet is distributed over more than one transmit buffer in memory, the
After transmission is complete, the optional generation of the ALLS interrupt indicates
that all transmit data has been sent on pin TxD.
Any ’XF’ command resets the transmit DMA controller for new operation starting with
TBADDR1 and XBC1 again.
Note: In HDLC Automode, the ’XF’ command may be replaced by the ’XIF’ command in
Figure 61
Data Sheet
trailer (e.g. CRC and Flag in HDLC), if applicable. The Transmit DMA Transfer End
(TDTE) interrupt is generated (refer to
’XF’ command (without setting the ’XME’ bit)starts transmission of a buffer. A Transmit
DMA Transfer End (TDTE) interrupt is generated whenever a block of <XBC1> bytes
is completely transferred. For the last buffer, containing the end of the transmit packet,
the ’XF’ command is issued together with bit ’XME’ set (refer to
Packet n:
Packet (n+1):
the same register, when transmission of an I-frame is desired.
(write transmit byte count with command
(write transmit buffer start address)
(write transmit buffer start address)
DMA Transmit (Single Buffer per Packet)
(write transmit byte count with
command bit 'XF'+'XME')
ALLS interrupt (optional)
CPU / MEMORY
TDTE interrupt
bit 'XF'+'XME')
...
...
Figure
264
61).
TBADDR1
XBC1
TFIFO
TFIFO
TFIFO
TBADDR1
XBC1
MISTRAL
DMA transfer of
<XBC1> transmit
data bytes
Figure
Programming
62).
PEB 20542
PEF 20542
2000-09-14