PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 277

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
7.7.1.2
Figure 70
Figure 71
Data Sheet
(1) Signals BHE and D(15:8) only available in 16-bit Infineon/Intel bus mode.
D(15:8)
(1) Signals BHE and D(15:8) only available in 16-bit Infineon/Intel bus mode.
(2) Interrupt signal shown is push-pull, active high. Same timings apply to push-pull, active low interrupt
D(15:8)
READY
READY
D(7:0)
A(7:0)
signal. In case of open-drain output the timing depends on external components.
BHE
D(7:0)
A(7:0)
BHE
INT
WR
CS
RD
CS
1)
1)
2)
1)
1)
Infineon/Intel Bus Interface Timing (Slave Access)
Infineon/Intel Read Cycle Timing (Slave Access)
Infineon/Intel Write Cycle Timing (Slave Access)
14a
14a
4
4
6
6
10
14
14
9
277
8
12
11
13
11a
15
5
Electrical Characteristics
5
7
16
7
15
17
17
PEB 20542
PEF 20542
15a
15a
2000-09-14

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