PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 186

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

PEB 20542
PEF 20542
Register Description (UDAC3)
AC3..0
User Defined ASYNC Character Control Map
(hdlc mode)
This bit field is valid in HDLC asynchronous and octet-synchronous PPP
mode only:
These bit fields define user determined characters as control characters
which have to be mapped into the transmit data stream.
In register ACCM only characters 00
..1F
can be selected as control
H
H
characters. Register UDAC allows to specify any four characters in the
range 00
..FF
.
H
H
The default value is a 7E
flag which must be always mapped. Thus no
H
additional character is mapped if 7E
’s are programed to bit fields
H
AC3...0 (reset value).
(7E
is mapped automatically, even if not defined via a AC bit field.)
H
Data Sheet
5-186
2000-09-14