PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 43
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Table 4
Pin
No.
67
68
69
70
56
64
Data Sheet
Ball
No.
D6
A6
B5
D5
D8
C6
Pin Definitions - System Interface (cont’d)
Symbol
RPA
RPB
RPC
RPD
XDI
SCLKX
Input (I)
Output (O)
Supply (S)
O
I
I + PU
System Interface Transmit
Function
Frame Synchronous Pulse (RFSP)
PC(1:4).RPC(2:0) = 111
Active low framing pulse derived from the
received PCM route signal (line side, RCLK).
During loss of synchronization (bit
FRS0.LFA = 1), this pulse is suppressed (not
influenced during alarm simulation).
Pulse frequency: 8 kHz
Pulse width: 488 ns (E1) or 648 ns (T1/J1).
Transmit Data In
Transmit data received from the system
highway. Latching of data is done with rising or
falling transitions of SCLKX according to bit
SIC3.RESX.
The delay between the beginning of time slot 0
and the initial edge of SCLKX (after SYPX
goes active) is determined by the registers
XC(1:0).
In higher (more than 1.544/2.048 Mbit/s) data
rates sampling of data is defined by bits
SIC2.SICS(2:0).
System Clock Transmit
Working clock for the transmit system interface
with a frequency of 16.384/8.192/4.096/2.048
in E1 mode and 16.384/8.192/4.096/2.048
MHz (SIC2.SSC2 = 0) or 12.352/6.176/3.088/
1.544 MHz (SIC2.SSC2 = 1) in T1/J1 mode .
43
Pin Descriptions
FALC56 V1.2
PEB 2256
2002-08-27
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