PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 282

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

EO1(1:0)
EO2(1:0)
EO3(1:0)
Time Slot Bit Select 1 (Read/Write)
Value after reset: FF
TSBS1
TSB1(7:0)
Data Sheet
TSB17
7
Even/Odd frame selection HDLC Channel 1
Channel 1 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
Even/Odd frame selection HDLC Channel 2
Channel 2 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
Even/Odd frame selection HDLC Channel 3
Channel 3 HDLC protocol data can be sent in even, odd or both
frames of a multiframe.
00 = Even and odd frames
01 = Odd frames only
10 = Even frames only
11 = Undefined
TSB16
Time Slot Bit Selection - HDLC Channel 1
Only bits selected by this register are used for HDLC channel 1 in
selected time slots. Time slot selection is done by setting the
appropriate bits in registers TTR(4:1) and RTR(4:1) independently
for receive and transmit direction. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot(s) are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
H
channel 1 reception and transmission.
TSB15
TSB14
282
TSB13
TSB12
TSB11
TSB10
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(A1)