PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 12

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Table 26
Table 27
Table 28
Table 29
Table 30
Table 31
Table 32
Table 33
Table 34
Table 35
Table 36
Table 37
Table 38
Table 39
Table 40
Table 41
Table 42
Data Sheet
Pin Definitions - Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . 29
Pin Definitions - Line Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin Definitions - Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Pin Definitions - System Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Pin Definitions - Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Data Bus Access (16-Bit Intel Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Data Bus Access (16-Bit Motorola Mode) . . . . . . . . . . . . . . . . . . . . . . 52
Selectable Bus and Microprocessor Interface Configuration . . . . . . . . 53
TAP Controller Instruction Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
RCLK Output Selection (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Recommended Receiver Configuration Values (E1) . . . . . . . . . . . . . 63
External Component Recommendations (Monitoring) . . . . . . . . . . . . . 64
System Clocking (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Output Jitter (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Receive Buffer Operating Modes (E1) . . . . . . . . . . . . . . . . . . . . . . . . . 71
Allocation of Bits 1 to 8 of Time Slot 0 (E1) . . . . . . . . . . . . . . . . . . . . . 80
Transmit Transparent Mode (Doubleframe E1) . . . . . . . . . . . . . . . . . . 81
CRC-Multiframe Structure (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Transmit Transparent Mode (CRC Multiframe E1) . . . . . . . . . . . . . . . 84
Summary of Alarm Detection and Release (E1) . . . . . . . . . . . . . . . . . 90
Recommended Transmitter Configuration Values (E1) . . . . . . . . . . . . 95
Transmit Buffer Operating Modes (E1) . . . . . . . . . . . . . . . . . . . . . . . . 98
System Clocking and Data Rates (E1) . . . . . . . . . . . . . . . . . . . . . . . 102
Time Slot Assigner HDLC Channel 1 (E1) . . . . . . . . . . . . . . . . . . . . . 113
RCLK Output Selection (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Recommended Receiver Configuration Values (T1/J1). . . . . . . . . . . 122
External Component Recommendations (Monitoring) . . . . . . . . . . . . 123
System Clocking (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Output Jitter (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Channel Translation Modes (DS1/J1) . . . . . . . . . . . . . . . . . . . . . . . . 131
Receive Buffer Operation Modes (T1/J1) . . . . . . . . . . . . . . . . . . . . . 132
Resynchronization Timing (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
4-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . 142
12-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . 143
Extended Superframe Structure (F24, ESF; T1/J1) . . . . . . . . . . . . . . 144
72-Frame Multiframe Structure (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . 148
Summary Frame Recover/Out of Frame Conditions (T1/J1) . . . . . . . 149
Summary of Alarm Detection and Release (T1/J1) . . . . . . . . . . . . . . 150
Recommended Transmitter Configuration Values (T1/J1). . . . . . . . . 155
Transmit Buffer Operating Modes (T1/J1) . . . . . . . . . . . . . . . . . . . . . 159
Pulse Shaper Programming (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . 159
Structure of Periodical Performance Report (T1/J1) . . . . . . . . . . . . . 163
12
FALC56 V1.2
PEB 2256
2002-08-27
Page