PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 253

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

Loop Code Register 2 (Read/Write)
Value after reset: 00
LCR2
LDC(7:0)
Loop Code Register 3 (Read/Write)
Value after reset: 00
LCR3
LAC(7:0)
Data Sheet
LDC7
LAC7
7
7
Line Loop-Back Deactivate Code
If enabled by bit FMR3.XLD = 1 the LLB deactivate code
automatically repeats until the LLB generator is stopped. Transmit
data is overwritten by the LLB code. LDC0 is transmitted last. For
correct operations bit LCR1.XPRBS has to cleared.
If LCR2 is changed while the previous deactivate code has been
detected and is still received, bit RSP.LLBDD will stay active until the
incoming
(CMDR.RRES = 1).
Line Loop-Back Activate Code
If enabled by bit FMR3.XLU = 1 the LLB activate code automatically
repeats until the LLB generator is stopped. Transmit data is
overwritten by the LLB code. LAC0 is transmitted last. For correct
operations bit LCR1.XPRBS has to cleared.
If LCR3 is changed while the previous activate code has been
detected and is still received, bit RSP.LLBAD will stay active until the
incoming
(CMDR.RRES = 1).
H
H
signal
signal
changes
changes
253
or
or
a
a
receiver
receiver
reset
reset
LDC0
LAC0
FALC56 V1.2
E1 Registers
0
0
is
is
PEB 2256
2002-08-27
initiated
initiated
(3C)
(3D)