PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 256

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

System Interface Control 3 (Read/Write)
Value after reset: 00
SIC3
CASMF
Data Sheet
CASMF
7
one eighth of the time slot. Data is not repeated. The time while data
is active during a 8
RSIG are cleared (driven to low level) while XDI/XSIG are ignored for
the remaining time of the 8 488 ns or for the remaining channel
phases. The channel phases are selectable with these bits.
000 = Data active in channel phase 1, valid if system data rate is
001 = Data active in channel phase 2, valid if system data rate is
010 =Data active in channel phase 3, valid if data rate is 16/8 Mbit/s
011 = Data active in channel phase 4, valid if data rate is 16/8 Mbit/s
100 = Data active in channel phase 5, valid if data rate is 16 Mbit/s
101 = Data active in channel phase 6, valid if data rate is 16 Mbit/s
110 = Data active in channel phase 7, valid if data rate is 16 Mbit/s
111 = Data active in channel phase 8, valid if data rate is 16 Mbit/s
CAS Multiframe Begin Marker
0 =
1 =
H
16 8 4 Mbit/s
16 8 4 Mbit/s
The time slot 0 multiframe begin is asserted on pin RP(A to D)/
pin function RMFB.
The time slot 16 CAS multiframe begin is asserted on pin RP(A
to D)/pin function RMFB.
488 ns time slot is called a channel phase. RDO/
256
RESX
RESR
TTRF
FALC56 V1.2
DAF
E1 Registers
0
PEB 2256
2002-08-27
(40)