PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 297

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

RSIF
RS13
RS15
Data Sheet
If framing is aligned, the time slot 0 is not taken into account for the
error rate calculation.
Any change of this bit causes an LLBSC interrupt.
PRBS Status
LCR1.EPRM = 1: The current status of the PRBS synchronizer is
indicated in this bit. It is set high if the synchronous state is reached
even in the presence of a bit error rate of 10
containing all zeros or all ones with/without framing bits is also a valid
pseudo-random binary sequence.
Receive Spare Bit for International Use (FAS Word)
First bit in FAS-word. Used only in doubleframe format, otherwise
fixed to "1".
Receive Spare Bit (Frame 13, CRC Multiframe)
First bit in service word of frame 13. Significant only in CRC-
multiframe format, otherwise fixed to "0". This bit is updated with
beginning of every received CRC multiframe.
Receive Spare Bit (Frame 15, CRC Multiframe)
First bit in service word of frame 15. Significant only in CRC-
multiframe format, otherwise fixed to "0". This bit is updated with
beginning of every received CRC multiframe.
297
-1
. A data stream
FALC56 V1.2
E1 Registers
PEB 2256
2002-08-27