PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 397

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

DIV3
Global Clock Mode Register 1 (Read/Write)
Value after reset: 00
GCM1
PHD_E1(7:0)
Global Clock Mode Register 2 (Read/Write)
Value after reset: 00
GCM2
PHD_E1(11:8)
VFREQ_EN
Data Sheet
DVM_E1
PHD_E1
7
7
7
2
DVM_E1
PHD_E1
Data Inversion - HDLC Channel 3
Setting this bit will invert the internal generated HDLC data stream.
0
1
Frequency Adjust for E1
Frequency Adjust for E1
Variable Frequency Enable
0 =
1 =
For details see calculation formulas below.
For details see calculation formulas below.
H
H
6
1
Normal operation, HDLC data stream not inverted
HDLC data stream inverted
Fixed clock frequency of 2.048 (E1) or 1.544 MHz (T1/J1)
Variable master clock frequency
DVM_E1
PHD_E1
5
0
VFREQ_
PHD_E1
EN
4
397
PHD_E1
PHD_E1
11
3
PHD_E1
PHD_E1
10
2
PHD_E1
PHD_E1
1
9
PHD_E1
PHD_E1
T1/J1 Registers
FALC56 V1.2
0
0
0
8
PEB 2256
2002-08-27
(93)
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