ISP1161A1BM ST-Ericsson Inc, ISP1161A1BM Datasheet - Page 92

• Manufacturer Part Number: ISP1161A1BM
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161A1BM

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1163; ISP1161A1BM,557

Philips Semiconductors
Table 75:
9397 750 13961
Product data
Name
Write/Read DMA Counter
Reset Device
Data flow commands
Write Control OUT Buffer
Write Control IN Buffer
Write Endpoint n Buffer
(n = 1 to 14)
Read Control OUT Buffer
Read Control IN Buffer
Read Endpoint n Buffer
(n = 1 to 14)
Stall Control OUT Endpoint
Stall Control IN Endpoint
Stall Endpoint n
(n = 1 to 14)
Read Control OUT Status
Read Control IN Status
Read Endpoint n Status
(n = 1 to 14)
Validate Control OUT Buffer
Validate Control IN Buffer
Validate Endpoint n Buffer
(n = 1 to 14)
Clear Control OUT Buffer
Clear Control IN Buffer
Clear Endpoint n Buffer
(n = 1 to 14)
Unstall Control OUT
Endpoint
Unstall Control IN Endpoint
Unstall Endpoint n
(n = 1 to 14)
Check Control OUT Status
Check Control IN Status
Check Endpoint n Status
(n = 1 to 14)
DC command and register summary
[4]
[4]
[4]
Destination
DcDMACounter register
resets all registers
illegal: endpoint is read-only (00)
FIFO endpoint 0 IN
FIFO endpoint 1 to 14
(IN endpoints only)
FIFO endpoint 0 OUT
illegal: endpoint is write-only (11)
FIFO endpoint 1 to 14
(OUT endpoints only)
Endpoint 0 OUT
Endpoint 0 IN
Endpoint 1 to 14
DcEndpointStatus register
endpoint 0 OUT
DcEndpointStatus register
endpoint 0 IN
DcEndpointStatus register n
endpoint 1 to 14
illegal: IN endpoints only
FIFO endpoint 0 IN
FIFO endpoint 1 to 14
(IN endpoints only)
FIFO endpoint 0 OUT
illegal
FIFO endpoint 1 to 14
(OUT endpoints only)
Endpoint 0 OUT
Endpoint 0 IN
Endpoint 1 to 14
DcEndpointStatusImage
register endpoint 0 OUT
DcEndpointStatusImage
register endpoint 0 IN
DcEndpointStatusImage
register n endpoint 1 to 14
[3]
Rev. 03 — 23 December 2004
[2]
[2]
…continued
[3]
[2]
Code
(Hex)
F2/F3
F6
01
02 to 0F
10
12 to 1F
40
41
42 to 4F
50
51
52 to 5F
(60)
61
62 to 6F
70
(71)
72 to 7F
80
81
82 to 8F
D0
D1
D2 to DF
USB single-chip host and device controller
Transaction
write/read 1 word
-
-
N
isochronous:
N
interrupt/bulk:
N
N
-
isochronous:
N
interrupt/bulk:
N
-
-
-
read 1 word
read 1 word
read 1 word
-
none
none
none
-
none
-
-
-
read 1 word
read 1 word
read 1 word
64 bytes
1023 bytes
64 bytes
64 bytes
1023 bytes
64 bytes
[1]
[6]
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Reference
Section 13.1.7 on page 98
Section 13.1.8 on page 99
Section 13.2.1 on page 99
Section 13.2.2 on page 100
Section 13.2.4 on page 102
Section 13.2.5 on page 102
Section 13.2.3 on page 101
Section 13.2.6 on page 102
ISP1161A1
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