ISP1161A1BM ST-Ericsson Inc, ISP1161A1BM Datasheet - Page 108

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ISP1161A1BM

Manufacturer Part Number
ISP1161A1BM
Description
IC USB HOST/DEVICE CTRLR 64-LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1161A1BM

Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1163
ISP1161A1BM,557

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Philips Semiconductors
Table 108: DcInterrupt register: bit allocation
9397 750 13961
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
BUSTATUS
EP14
EP6
31
23
15
R
R
R
0
0
7
0
13.3.6 Read Interrupt register (R: C0H)
Table 107: DcChipID register: bit description
This command indicates the sources of interrupts as stored in the 4-byte DcInterrupt
register. Each individual endpoint has its own interrupt bit. The bit allocation of the
DcInterrupt register is shown in
bus status in the interrupt service routine. Interrupts are enabled via the
DcInterruptEnable register, see
Remark: While reading the DcInterrupt register, read both 2 bytes.
Code (Hex): C0 — read interrupt register
Transaction — read 2 words
Remark: For details on interrupt control, see
SP_EOT
Table 109: DcInterrupt register: bit description
Bit
15 to 8
7 to 0
Bit
31 to 24
23 to 10
9
8
7
6
EP13
EP5
30
22
14
R
R
R
0
0
6
0
Symbol
CHIPIDH[7:0]
CHIPIDL[7:0]
Symbol
-
EP14 to EP1
EP0IN
EP0OUT
BUSTATUS
SP_EOT
PSOF
EP12
EP4
29
21
13
R
R
R
0
0
5
0
Rev. 03 — 23 December 2004
EP11
Description
chip ID code (61H)
silicon version (23H, with 23 representing the BCD encoded
version number)
Description
reserved
A logic 1 indicates the interrupt source(s): endpoint 14 to 1.
A logic 1 indicates the interrupt source: control IN endpoint.
A logic 1 indicates the interrupt source: control OUT endpoint.
Monitors the current USB bus status (0 = awake, 1 = suspend).
A logic 1 indicates that an EOT interrupt has occurred for a short
packet.
SOF
EP3
28
20
12
R
R
R
0
0
4
0
reserved
Table
Section
00H
R
108. Bit BUSTATUS is used to verify the current
USB single-chip host and device controller
EP10
EOT
EP2
13.1.5.
27
19
11
R
R
R
0
0
3
0
Section
SUSPND
EP9
EP1
26
18
10
R
R
R
0
0
2
0
8.6.3.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A1
RESUME
EP0IN
EP8
25
17
R
R
R
0
9
0
1
0
EP0OUT
RESET
107 of 136
EP7
24
16
R
R
R
0
8
0
0
0

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