ISP1161A1BM ST-Ericsson Inc, ISP1161A1BM Datasheet - Page 26

• Manufacturer Part Number: ISP1161A1BM
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161A1BM

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1163; ISP1161A1BM,557

Philips Semiconductors
9397 750 13961
Product data
Fig 24. ISP1161A1 HC USB transaction loop.
Initialize
Reset
Entry
HC
USBOperational
HC state =
Description of
1. Reset
2. Initialize HC
3. Entry
4. Need USB traffic
5. Prepare PTD data in microprocessor’s system RAM
This includes hardware reset by pin RESET and software reset by the
HcSoftwareReset command (A9H). The reset function will clear all the HC’s
internal control registers to their reset status. After reset, the HCD must initialize
the ISP1161A1 USB HC by setting some registers.
It includes:
See also
The normal entry point. The microprocessor returns to this point when there
are HC requests.
USB devices need the HC to generate USB traffic when they have USB traffic
requests such as:
To generate USB traffic, the HCD must enter the USB transaction loop.
The communication between the HCD and the ISP1161A1 HC is in the form of
Philips Transfer Descriptor (PTD) data. The PTD data provides USB traffic
information about the commands, status, and USB data packets.
a. Setting the physical size for the HC’s internal FIFO buffer RAM by setting the
d. Enabling interrupt events, if required
g. Setting the HcControl register to move the HC into USBOperational state
a. Connecting to or disconnecting from the downstream ports
b. Setting the HcHardwareConfiguration register according to requirements
c. Clearing interrupt events, if required
e. Setting the HcFmInterval register (0DH to read, 8DH to write)
b. Issuing the Resume signal to the HC
f. Setting the HC’s Root Hub registers
HcITLBufferLength register (2AH to read, AAH to write) and the
HcATLBufferLength register (2BH to read, ABH to write)
HC informs HCD of
USB traffic results
USB traffic?
Section
Figure
Need
Exit
Rev. 03 — 23 December 2004
no
24:
9.5.
yes
HC performs USB transactions
Prepare PTD data in
P system RAM
via USB bus I/F
USB single-chip host and device controller
Transfer PTD data into
HC FIFO buffer RAM
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
HC interprets
PTD data
ISP1161A1
MGT948
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