ISP1161A1BM ST-Ericsson Inc, ISP1161A1BM Datasheet - Page 50

• Manufacturer Part Number: ISP1161A1BM
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161A1BM

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1163; ISP1161A1BM,557

Philips Semiconductors
9397 750 13961
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
reserved
R/W
23
15
7
0
10.1.5 HcInterruptEnable register (R/W: 04H/84H)
Table 15:
Each enable bit in the HcInterruptEnable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used
to control which events generate a hardware interrupt. A hardware interrupt is
requested on the host bus when three conditions occur:
Bit
31 to 7
6
5
4
3
2
1
0
•
•
•
RHSC
R/W
A bit is set in the HcInterruptStatus register
The corresponding bit in the HcInterruptEnable register is set
Bit MasterInterruptEnable is set.
22
14
6
0
HcInterruptStatus register: bit description
Symbol
-
RHSC
FNO
UE
RD
SF
-
SO
FNO
R/W
21
13
5
0
Rev. 03 — 23 December 2004
Description
reserved
RootHubStatusChange: This bit is set when the content of
HcRhStatus or the content of any of HcRhPortStatus[1:2] has
changed.
FrameNumberOverflow: This bit is set when the MSB of
HcFmNumber (bit 15) changes value.
UnrecoverableError: This bit is set when the HC detects a
system error not related to USB. The HC does not proceed with
any processing nor signaling before the system error has been
corrected. The HCD clears this bit after the HC has been reset.
OHCI: Always set to logic 0.
ResumeDetected: This bit is set when the HC detects that a
device on the USB is asserting resume signaling from a state of no
resume signaling. This bit is not set when HCD enters the
USBResume state.
StartofFrame: At the start of each frame, this bit is set by the HC
and an SOF is generated.
reserved
SchedulingOverrun: This bit is set when the USB schedules for
current frame overruns. A scheduling overrun will also cause the
SchedulingOverrunCount of HcCommandStatus to be
incremented.
R/W
UE
20
12
4
0
reserved
reserved
R/W
R/W
00H
00H
USB single-chip host and device controller
R/W
RD
19
11
3
0
R/W
SF
18
10
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A1
reserved
R/W
17
9
1
0
R/W
SO
49 of 136
16
8
0
0