PNX1501E,557 NXP Semiconductors, PNX1501E,557 Datasheet - Page 699

• Manufacturer Part Number: PNX1501E,557
• Description: IC MEDIA PROC 266MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Other names: 935274728557; PNX1501E; PNX1501E

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 5:
Tx(Rt)Descriptor
0xFEEDB0EC
Transmit Descriptor Memory Layout
0xFEEDB0EC
0xFEEDB0FC
0xFEEDB10C
0xFEEDB118
0xFEEDB11C
0xFEEDB0F8
0xFEEDB008
0xFEEDB128
Descriptor Array FIFO
4.2 Transmit Descriptors and Status
0 0
0 0
0 0
0 0
Packet 0xFEEDB314
Packet 0xFEEDB411
Packet 0xFEEDB419
Packet 0xFEEDB324
Time-stamp
Time-stamp
Time-stamp
Time-stamp
Control
Control
Control
Control
Table 7: Receive Status Information Word
For multi-fragment packets, the value of the AlignmentError, RangeError,
LengthError, SymbolError and CRCError bits in all but the last fragment in the packet
will be 0; likewise the value of the FailFilter, Multicast, Broadcast, VLAN and
ControlFrame bits is undefined. The status of the last fragment in the packet will copy
the value for these bits from the MII Interface. All fragment statuses will have a valid
LastFrag, EntryLevel, Error, Overrun and NoDescriptor bits.
Figure 5
real-time and non-real-time descriptors is identical.
Bit
18
17:11 -
10:0
Pad
Pad
Pad
Pad
Name
ControlFrame
EntryLevel
7
7
7
7
shows the layout of transmit descriptors in memory. The layout and format of
Fragment Buffers
Rev. 3 — 17 March 2006
Packet 0 header (8 bytes)
Packet 1 header (8 bytes)
Function
Indicates this is a control frame for flow control, either a pause frame
or a frame with an unsupported opcode.
Unused
Size in bytes of the actual data transferred into one fragment buffer.
In other words, this is the size of the packet or fragment as actually
written by the DMA manager for one descriptor. This may be
different from the Control.Size bits that indicate the size of the buffer
allocated by the device driver. Size is –1 encoded, e.g., if the buffer
has 8 bytes the EntryLevel value should be 7.
Chapter 23: LAN100 — Ethernet Media Access Controller
Packet 0 payload (12 bytes)
0xFEEDB1F8
Tx(Rt)Status
Tx(Rt)DescriptorIndex
Tx(Rt)ConsumeIndex
Tx(Rt)ProduceIndex
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
Status Array FIFO
PNX15xx Series
StatusInfo
StatusInfo
StatusInfo
StatusInfo
0xFEEDB1F8
0xFEEDB200
0xFEEDB208
0xFEEDB210
23-30