PNX1501E,557 NXP Semiconductors, PNX1501E,557 Datasheet - Page 535

• Manufacturer Part Number: PNX1501E,557
• Description: IC MEDIA PROC 266MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Other names: 935274728557; PNX1501E; PNX1501E

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 5:
SCK
WS
SD
Serial Frame of the SAA7366 18-Bit I
0
left
1
n
2
(18)
3
The following table shows the exact bit positions assigned for a data item ‘S’.
Table 3: Bit Positions Assigned for Each Data Item
See
to collect 16-bit samples using the Philips SAA7366 I
Section
For example, if it were desired to use only the 12 MSBits of the A/D converter in
Figure
LEFT[15:4] being set with data bits 0..11 and LEFT[3:0] being set equal to zero.
RIGHT[15:4] is set with data bits 32..43 and RIGHT[3:0] is set to zero.
Similarly, if it was desired to use only the 12 MSBits, but send 32 bit samples to
memory, use the settings of
LEFT[31:20] being set with data bits 0...11 and LEFT[20:0] being set equal to zero.
RIGHT[31:4] is set with data bits 32...43 and RIGHT[20:0] is set to zero.
Table 4: Example Setup For SAA7366
Operating Mode
16 bit/sample, MSB-first
16 bit/sample, LSB-first
32 bit/sample, MSB-first
32 bit/sample, LSB-first
Field
SER_MASTER 0
SCKDIV
WSDIV
POLARITY
FRAMEMODE 00
VALIDPOS
LEFTPOS
RIGHTPOS
DATAMODE
SSPOS
CLOCK_EDGE 0
Figure 5
5, use the settings of
4..) The setup assumes the SAA7366 acts as the serial master.
18
19
and
Value Explanation
3
63
0
n/a
0
32
0
0
Table 4
Rev. 3 — 17 March 2006
31 32 33 34
2
S A/D Converter (Format 2 SWS)
SAA7366 is serial master.
SCK set to OSCLK/4 (not needed since SER_MASTER = 0).
Serial frame length of 64 bits (not needed since SER_MASTER = 0)
Frame starts with negative WS.
Take a sample of each serial frame.
Don’t care (Every frame is valid).
Bit position 0 is MSB of left channel and will go to LEFT[15].
Bit position 32 is MSB of right channel and will go to RIGHT[15].
MSB first
Stop with LEFT/RIGHT[0].
Sample WS and SD on positive SCK edges for I
right
for an example of how the Audio In module registers are set
First Bit
S[15]
S[SSPOS]
S[31]
S[SSPOS]
n
(18)
Table 4
Table 4
with SSPOS set to 20. This results in
with SSPOS set to four. This results in
50 51
Last Bit
S[SSPOS]
S[15]
S[SSPOS]
S[31]
52
2
62 63 0
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
S 18-bit A/D converter. (See
PNX15xx Series
Chapter 16: Audio Input
Valid SSPOS Values
0..15
0..15
0..31
0..31
1
left
n+1
(18)
2
S
16-9