XC4VFX60-10FFG1152C Xilinx Inc, XC4VFX60-10FFG1152C Datasheet - Page 97

• Manufacturer Part Number: XC4VFX60-10FFG1152C
• Description: IC FPGA VIRTEX-4 FX 60K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-10FFG1152C

• Total Ram Bits: 4276224
• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Number Of I /o: 576
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-BBGA, FCBGA
• No. Of Logic Blocks: 6656
• No. Of Macrocells: 56880
• Family Type: Virtex-4
• No. Of Speed Grades: 10
• No. Of I/o's: 576
• Clock Management: DCM
• Core Supply: RoHS Compliant
• Package: 1152FCBGA
• Family Name: Virtex®-4
• Device Logic Units: 56880
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 576
• Ram Bits: 4276224
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Legacy Support
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
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The Virtex-4 device supports the Virtex-II and Virtex-II Pro family DCM primitives. The
mapping of Virtex-II or Virtex-II Pro FPGA DCM components to Virtex-4 FPGA
DCM_ADV components are as follows:
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Clock Event 2
The CLKFX output stops toggling. Within 257 to 260 clock cycles after this event, the
CLKFX stopped status DO[2] is asserted to indicate that the CLKFX output stops
toggling.
Clock Event 3
The CLKFB input stops toggling. Within 257 to 260 clock cycles after this event, the
CLKFB stopped status DO[3] is asserted to indicate that the CLKFB output stops
toggling.
Clock Event 4
The CLKIN input stops toggling. Within 9 clock cycles after this event, DO[1] is
asserted to indicate that the CLKIN output stops toggling.
CLKIN, CLKFB, PSCLK, PSINDEC, PSEN, RST, CLK0, CLK90, CLK180, CLK270,
CLK2X, CLK2X180, CLKFX, CLKFX180, CLKDV, PSDONE, LOCKED of Virtex-4
FPGA primitives (DCM_BASE/DCM_PS/DCM_ADV) map to the same
corresponding pins of a Virtex-II or Virtex-II Pro FPGA DCM.
Dynamic reconfiguration pins of Virtex-4 FPGA DCM_ADV are not accessible when a
Virtex-II or Virtex-II Pro FPGA DCM component is used, except for DO[15:0].
DO[7:0] pins of Virtex-4 FPGA DCM_ADV/DCM_PS components map to Status[7:0]
of the Virtex-II or Virtex-II Pro FPGA DCMs. DO[15:8] of DCM_ADV/DCM_PS
components are not available when using Virtex-II or Virtex-II Pro FPGA DCM
components.
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Legacy Support
97