XC4VFX60-10FFG1152C Xilinx Inc, XC4VFX60-10FFG1152C Datasheet - Page 355

IC FPGA VIRTEX-4 FX 60K 1152FBGA

XC4VFX60-10FFG1152C

Manufacturer Part Number
XC4VFX60-10FFG1152C
Description
IC FPGA VIRTEX-4 FX 60K 1152FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r

Specifications of XC4VFX60-10FFG1152C

Total Ram Bits
4276224
Number Of Logic Elements/cells
56880
Number Of Labs/clbs
6320
Number Of I /o
576
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
No. Of Logic Blocks
6656
No. Of Macrocells
56880
Family Type
Virtex-4
No. Of Speed Grades
10
No. Of I/o's
576
Clock Management
DCM
Core Supply
RoHS Compliant
Package
1152FCBGA
Family Name
Virtex®-4
Device Logic Units
56880
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
576
Ram Bits
4276224
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC4VFX60-10FFG1152C
Manufacturer:
XilinxInc
Quantity:
3 000
Part Number:
XC4VFX60-10FFG1152C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC4VFX60-10FFG1152C
Manufacturer:
XILINX
0
Part Number:
XC4VFX60-10FFG1152C
0
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
The timing diagram of the output DDR using the OPPOSITE_EDGE mode is shown in
Figure
7-22.
Figure 7-22: Output DDR Timing in OPPOSITE_EDGE Mode
OQ
CE
D1
D2
C
Figure 7-21: Output DDR in OPPOSITE_EDGE Mode
CE
D1
D2
R
C
S
D1A
www.xilinx.com
D1A D2A D1B
D2A
D
R
CE
D
R
CE
CLK
CLK
D1B
S
S
D2B
Q
Q
D2B D1C D2C D1D
D1C
DDR MUX
D2C
ug070_7_21_080104
ug070_7_22_080104
D1D
OQ
OLOGIC Resources
D2D
355

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