EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 57

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 3: Memory Blocks in Arria II GX Devices
Design Considerations
Read-During-Write
Figure 3–17. Arria II GX Read-During-Write Data Flow
Figure 3–18. Same Port Read-During Write: New Data Mode
© November 2009
q_a (asyn)
Altera Corporation
address
bytenna
data_a
wrena
clk_a
rdena
You can customize the read-during-write behavior of the Arria II GX memory blocks
to suit your design requirements. Two types of read-during-write operations are
available: same port and mixed port.
two types.
Same-Port Read-During-Write Mode
This mode applies to either a single-port RAM or the same port of a true dual-port
RAM. In same-port read-during-write mode, three output choices are available: new
data mode (or flow-through), old data mode, or don’t care mode. In new data mode,
the new data is available on the rising edge of the same clock cycle on which it was
written. In old data mode, the RAM outputs reflect the old data at that address before
the write operation proceeds. In don’t care mode, the RAM outputs don’t care values
for a read-during-write operation.
Figure 3–18
behavior in new data mode.
Port A
data in
Port A
data out
shows sample functional waveforms of same-port read-during-write
A123
01
XX23
B456
10
0A
B4XX
C789
00
XXXX
Figure 3–17
DDDD
Port B
data in
Port B
data out
DDDD
shows the difference between the
0B
EEEE
11
EEEE
Arria II GX Device Handbook, Volume 1
FFFF
Mixed-port
data flow
Same-port
data flow
FFFF
3–17