ADF4193BCPZ Analog Devices Inc, ADF4193BCPZ Datasheet - Page 9

• Manufacturer Part Number: ADF4193BCPZ
• Description: IC PLL FREQ SYNTHESIZER 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4193BCPZ

• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 3.5GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 3.5GHz
• Pll Type: Frequency Synthesis
• Frequency: 3.5GHz
• Supply Current: 24mA
• Supply Voltage Range: 2.7V To 3.3V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF4193EBZ2 - BOARD EVALUATION EB2 FOR ADF4193EVAL-ADF4193EBZ1 - BOARD EVALUATION EB1 FOR ADF4193
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Figure 11. Phase Settling Transient for a 75 MHz Jump from 1818 MHz to
Figure 10. V
Figure 12. Differential Charge Pump Output Compliance Range and
–2
–4
–6
–8
8
6
4
2
0
–10
–20
–30
–40
–50
50
40
30
20
10
0
5
4
3
2
1
0
0
–1
–5
1893 MHz (V
0.5
TUNE
Charge Pump Mismatch with V
0
0
Settling Transient for a 75 MHz Jump from 1818 MHz to
1.0
1893 MHz with Sirenza 1843T VCO
NORMAL OPERATING RANGE
1
5
I
I
TUNE
CP
UP
DOWN
CHARGE PUMP MISMATCH (%)
1.5
+25 ° C
DCS1800 Tx SETUP, 60kHz LOOP BW.
MEASURED ON EVAL-ADF4193-EB1
EVALUATION BOARD.
TIMERS: ICP = 28, SW1/SW2, SW3 = 35.
FREQUENCY LOCK IN WIDE BW MODE @ 4 μ s.
OUT
= | ICP
1.8 V to 3.7 V with Sirenza 1843T VCO)
ICP
ICP
10
2
= | ICP
+ / CP
–40 ° C
OUT
OUT
2.0
V
CP
CP
DCS1800 Tx SETUP, 60kHz LOOP BW.
MEASURED ON EVAL-ADF4193-EB1
EVALUATION BOARD WITH AD8302
PHASE DETECTOR.
TIMERS: ICP = 28, SW1/SW2, SW3 = 35.
PEAK PHASE ERROR < 5 ° @ 17.8 μ s
OUT
TUNE
15
3
+ P, ICP
+ N, ICP
OUT+
OUT–
OUT
OUT
+ P | + | ICP
TIME ( μ s)
TIME ( μ s)
2.5
+85 ° C
– P | + | ICP
– VOLTAGE (V)
20
4
OUT
OUT
3.0
25
5
– P
– N
OUT
P
1 = V
3.5
OUT
– N |
30
6
P
+ N |
2 = 5 V
4.0
35
7
4.5
40
8
5.0
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
45
9
Rev. C | Page 9 of 28
1818 MHz, the Bottom of the Allowed Tuning Range with the Sirenza 1843T VCO
Figure 15. Tuning Range with a Sirenza 1843T VCO and a 5.5 V Differential
Figure 13. V
Figure 14. Phase Settling Transient for a 75 MHz Jump from 1893 MHz to
–10
–20
–30
–40
–50
50
40
30
20
10
1818 MHz (V
1780
5
4
3
2
1
0
5
4
3
2
1
0
0
–1
–5
TUNE
Settling Transient for a 75 MHz Jump Down from 1893 MHz to
1800
0
0
V
V
V
P
P
CMR
TUNE
Amplifier Power Supply Voltage
1
5
1 = V
3 = 5.5V
1820
DCS1800 Tx SETUP, 60kHz LOOP BW.
MEASURED ON EVAL-ADF4193-EB1
EVALUATION BOARD.
TIMERS: ICP = 28, SW1/SW2, SW3 = 35.
FREQUENCY LOCK IN WIDE BW MODE @ 5 μ s.
+25 ° C
= 3.7 V to 1.8 V with Sirenza 1843T VCO)
= 3.3V
P
10
2
2 = 5V
1840
–40 ° C
FREQUENCY (MHz)
DCS1800 Tx SETUP, 60kHz LOOP BW.
MEASURED ON EVAL-ADF4193-EB1
EVALUATION BOARD WITH AD8302
PHASE DETECTOR.
TIMERS: ICP = 28, SW1/SW2, SW3 = 35.
PEAK PHASE ERROR < 5 ° @ 19.2 μ s
15
3
TIME ( μ s)
TIME ( μ s)
1860
+85 ° C
20
CP
4
A
OUT+
OUT
1880
25
5
(= V
(= AIN+)
CP
CP
V
CP
1900
TUNE
TUNE
OUT–
OUT+
30
6
OUT–
)
35
1920
7
(= AIN–)
ADF4193
40
8
1940
45
9