ADF4193BCPZ Analog Devices Inc, ADF4193BCPZ Datasheet - Page 3

• Manufacturer Part Number: ADF4193BCPZ
• Description: IC PLL FREQ SYNTHESIZER 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4193BCPZ

• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 3.5GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 3.5GHz
• Pll Type: Frequency Synthesis
• Frequency: 3.5GHz
• Supply Current: 24mA
• Supply Voltage Range: 2.7V To 3.3V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF4193EBZ2 - BOARD EVALUATION EB2 FOR ADF4193EVAL-ADF4193EBZ1 - BOARD EVALUATION EB1 FOR ADF4193
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SPECIFICATIONS
AV
referred to 50 Ω, T
Table 1.
Parameter
RF CHARACTERISTICS
REF
PHASE DETECTOR
CHARGE PUMP
DIFFERENTIAL AMPLIFIER
LOGIC INPUTS
LOGIC OUTPUTS
POWER SUPPLIES
RF Input Frequency (RF
RF Input Sensitivity
Maximum Allowable Prescaler
REF
REF
REF
REF
REF
Phase Detector Frequency
I
Absolute Accuracy
R
I
I
I
I
Input Current
Output Voltage Range
VCO Tuning Range
Output Noise
V
V
I
C
V
V
AV
DV
V
V
I
CP
CP
CP
CP
CP
INH
DD
DD
IN
SET
IH
IL
IN
OH
OL
P
P
1, V
3
Output Frequency
, Input Low Voltage
High Value
Low Value
Three-State Leakage
, Input High Voltage
DD
Up/Down
Up vs. Down Matching
vs. V
vs. Temperature
, Input Capacitance
CHARACTERISTICS
, I
DD
, Output Low Voltage
(AV
, Output High Voltage
= DV
IN
IN
IN
IN
IN
Range
INL
Input Frequency
Edge Slew Rate
Input Sensitivity
Input Capacitance
Input Current
P
, Input Current
2
DD
CP
+ DV
DD
= SDV
DD
+ SDV
A
= T
DD
3
= 3 V ± 10%, V
MIN
DD
IN
)
)
to T
MAX
, unless otherwise noted.
B Version
0.4/3.5
−10/0
470
10/300
300
0.7/V
0 to V
10
±100
26
6.6
104
5
1/4
1
0.1
1
1
1
1.4/(V
1.8/(V
7
1.4
0.7
±1
10
V
0.4
2.7/3.3
AV
4.5/5.5
5.0/5.65
27
P
DD
1, V
DD
− 0.4
DD
P
DD
P
P
2 = 5 V ± 10%, V
3 − 0.3)
3 − 0.8)
1
C Version
0.4/3.5
−10/0
470
10/300
300
0.7/V
0 to V
10
±100
26
6.6
104
5
1/4
1
0.1
1
1
1
1.4/(V
1.8/(V
7
1.4
0.7
±2
10
V
0.4
2.7/3.3
AV
4.5/5.5
5.0/5.65
35
Rev. C | Page 3 of 28
P
DD
3 = 5.35 V ± 5%, AGND = DGND = GND = 0 V, R
DD
− 0.4
DD
DD
P
P
3 − 0.3)
3 − 0.8)
2
Unit
GHz min/max
dBm min/max
MHz max
MHz min/max
V/μs min
V p-p
min/max
V max
pF max
μA max
MHz max
mA typ
μA typ
% typ
kΩ min/max
nA typ
% typ
% typ
% typ
nA typ
V min/max
V min/max
nV/√Hz typ
V min
V max
μA max
pF max
V min
V max
V min/V max
V min/V max
V min/V max
mA max
Test Conditions/Comments
See Figure 21 for input circuit
For f > 120 MHz, set REF/2 bit = 1. For f
< 10 MHz, use a dc-coupled square
wave
AC-coupled
CMOS-compatible
With R
With R
Nominally R
0.75 V ≤ V
0.75 V ≤ V
0.75 V ≤ V
@ 20 kHz offset
I
I
AV
V
22 mA typ
OH
OL
P
1, V
DD
= 500 μA
= 500 μA
≤ V
P
SET
SET
2 ≤ V
P
= 2.4 kΩ
= 2.4 kΩ
1, V
CP
CP
CP
P
≤ V
≤ V
≤ V
SET
3 ≤ 5.65 V
P
2 ≤ 5.5 V
= 2.4 kΩ
P
P
P
SET
– 1.5 V
– 1.5 V
– 1.5 V
= 2.4 kΩ, dBm
ADF4193