MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 35

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MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC908AP32CFBE

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant

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Addr.
Timer 2 Channel 1 Status and
PLL Control Register (PCTL)
PLL Bandwidth Control Reg-
Control Register (T2SC1)
PLL VCO Range Select
Register Name
PLL Reference Divider
PLL Multiplier Select
PLL Multiplier Select
Timer 2 Channel 1
Timer 2 Channel 1
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Select Register
U = Unaffected
Register High
Register High
Register Low
Register Low
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 9)
(T2CH1H)
(T2CH1L)
Register
(PBWC)
(PMSH)
(PMRS)
(PMDS)
(PMSL)
ister
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
X = Indeterminate
MC68HC908AP Family Data Sheet, Rev. 4
PLLIE
AUTO
CH1F
Bit 15
MUL7
VRS7
Bit 7
Bit 7
0
0
0
0
0
0
0
0
0
0
CH1IE
LOCK
MUL6
VRS6
PLLF
14
6
0
6
0
0
0
0
1
1
0
0
PLLON
MUL5
VRS5
ACQ
13
5
0
0
5
1
0
0
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
= Unimplemented
MS1A
MUL4
VRS4
BCS
12
4
0
4
0
0
0
0
0
0
0
0
0
ELS1B
MUL11
MUL3
RDS3
PRE1
VRS3
11
3
0
3
0
0
0
0
0
0
0
ELS1A
MUL10
MUL2
RDS2
PRE0
VRS2
10
R
2
0
2
0
0
0
0
0
0
0
= Reserved
TOV1
VPR1
MUL9
MUL1
VRS1
RDS1
1
0
9
1
0
0
0
0
0
0
0
Monitor ROM
CH1MAX
VPR0
MUL8
MUL0
VRS0
RDS0
Bit 0
Bit 8
Bit 0
R
0
0
0
0
0
0
1
35

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