MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 130

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MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC908AP32CFBE

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant

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Monitor ROM (MON)
8.5.3 LDRNGE
LDRNGE is used to load the data array in RAM with data from a range of FLASH locations.
The start location of FLASH from where data is retrieved is specified by the address ADDRH:ADDRL and
the number of bytes from this location is specified by DATASIZE. The maximum number of bytes that can
be retrieved in one routine call is 255 bytes. The data retrieved from FLASH is loaded into the data array
in RAM. Previous data in the data array will be overwritten. User can use this routine to retrieve data from
FLASH that was previously programmed.
The coding example below is to retrieve 64 bytes of data starting from $EE00 in FLASH. The Initialization
subroutine is the same as the coding example for PRGRNGE (see
LDRNGE
MAIN:
130
BSR
:
:
LDHX
JSR
:
Routine Description
Data Block Format
EQU
INITIALIZATION
#FILE_PTR
LDRNGE
Calling Address
Routine Name
Stack Used
$FC00
MC68HC908AP Family Data Sheet, Rev. 4
LDRNGE
Loads data from a range of locations
$FC00
7 bytes
Bus speed (BUS_SPD)
Data size (DATASIZE)
Starting address (ADDRH)
Starting address (ADDRL)
Data 1
Data N
Table 8-13. LDRNGE Routine
:
8.5.1
PRGRNGE).
Freescale Semiconductor

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