MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 297

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

21.5.4 SIM Break Flag Control Register
The SIM break flag control register (SBFCR) contains a bit that enables software to clear status bits while
the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
Freescale Semiconductor
;
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
Address:
Reset:
Read:
Write:
5
6
SBSW,SBSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
$FE03
Figure 21-7. SIM Break Flag Control Register (SBFCR)
BCFE
Bit 7
R
0
= Reserved
R
6
MC68HC908AP Family Data Sheet, Rev. 4
R
5
;
;
;If RETURNLO is not zero,
;then just decrement low byte.
;Else deal with high byte, too.
;Point to WAIT/STOP opcode.
;Restore H register.
See if wait mode or stop mode was exited by
break.
R
4
R
3
R
2
R
1
Break Module Registers
Bit 0
R
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