MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 293

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

Chapter 21
Break Module (BRK)
21.1 Introduction
This section describes the break module. The break module can generate a break interrupt that stops
normal program flow at a defined address to enter a background program.
21.2 Features
Features of the break module include:
21.3 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal to the CPU. The CPU then loads the instruction register with a software
interrupt instruction (SWI) after completion of the current CPU instruction. The program counter vectors
to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
Freescale Semiconductor
Note: Writing a logic 0 clears BW.
$FE0C
$FE0D
$FE00
$FE03
$FE0E
Addr.
•
•
•
•
Accessible input/output (I/O) registers during the break interrupt
CPU-generated break interrupts
Software-generated break interrupts
COP disabling during break interrupts
SIM Break Status Register
Break Status and Control
SIM Break Flag Control
Register Name
Break Address
Break Address
Register High
Register Low
(BRKSCR)
(SBFCR)
Register
Register
(BRKH)
(SBSR)
(BRKL)
Figure 21-1. Break Module I/O Register Summary
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
MC68HC908AP Family Data Sheet, Rev. 4
BRKE
BCFE
Bit 15
Bit 7
Bit 7
R
0
0
0
0
= Unimplemented
BRKA
14
R
R
6
0
6
0
0
13
R
R
5
0
5
0
0
0
12
R
R
R
4
0
4
0
0
0
= Reserved
11
R
R
3
0
3
0
0
0
10
R
R
2
0
2
0
0
0
SBSW
Note
R
1
0
9
0
1
0
0
0
Bit 0
Bit 8
Bit 0
R
R
0
0
0
0
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