MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 137

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MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC908AP32CFBE

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant

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Freescale Semiconductor
Addr.
$002C
$002D
$002A
$002B
$002E
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
TIM1 Status and Control
TIM2 Status and Control
TIM1 Channel 0 Status
TIM1 Channel 1 Status
TIM1 Counter Register
TIM1 Counter Register
TIM2 Counter Register
TIM2 Counter Register
TIM1 Counter Modulo
TIM2 Counter Modulo
and Control Register
and Control Register
TIM Counter Modulo
Register Name
TIM1 Channel 0
TIM1 Channel 0
TIM1 Channel 1
TIM1 Channel 1
Register High
Register High
Register High
Register High
Register Low
Register Low
Register Low
(T2MODH)
(T1MODL)
(T1CNTH)
(T2CNTH)
(T1CH0H)
(T1CH1H)
(T1CNTL)
(T2CNTL)
(TMODH)
(T1CH0L)
(T1CH1L)
(T1SC0)
(T1SC1)
Register
Register
(T1SC)
(T2SC)
Figure 9-2. TIM I/O Register Summary (Sheet 1 of 2)
High
High
Low
Low
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908AP Family Data Sheet, Rev. 4
Bit 15
Bit 15
CH0F
Bit 15
CH1F
Bit 15
Bit 15
Bit 15
Bit 7
TOF
Bit 7
Bit 7
Bit 7
Bit 7
TOF
Bit 7
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
= Unimplemented
CH0IE
CH1IE
TOIE
TOIE
14
14
14
14
14
14
6
0
0
6
0
1
6
1
0
6
0
6
0
0
6
0
1
TSTOP
TSTOP
MS0B
13
13
13
13
13
13
5
1
0
5
0
1
5
1
0
5
0
0
5
1
0
5
0
1
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MS0A
MS1A
TRST
TRST
12
12
12
12
12
12
4
0
0
0
4
0
1
4
1
0
4
0
4
0
0
0
4
0
1
ELS0B
ELS1B
11
11
11
11
11
11
3
0
0
0
3
0
1
3
1
0
3
0
3
0
0
0
3
0
1
ELS0A
ELS1A
PS2
PS2
10
10
10
10
10
10
2
0
0
2
0
1
2
1
0
2
0
2
0
0
2
0
1
Functional Description
TOV0
TOV1
PS1
PS1
1
0
9
0
1
0
9
1
1
1
0
9
1
0
9
1
0
9
0
1
0
9
1
CH0MAX
CH1MAX
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
PS0
PS0
0
0
0
1
1
0
0
0
0
0
1
137

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