MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 169

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

11.8.1 SCI Control Register 1
SCI control register 1:
LOOPS — Loop Mode Select Bit
ENSCI — Enable SCI Bit
TXINV — Transmit Inversion Bit
M — Mode (Character Length) Bit
Freescale Semiconductor
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This read/write bit enables loop mode operation. In loop mode the RxD pin is disconnected from the
SCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver must
be enabled to use loop mode. Reset clears the LOOPS bit.
This read/write bit enables the SCI and the SCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in SCI status register 1 and disables transmitter interrupts. Reset clears the ENSCI bit.
This read/write bit reverses the polarity of transmitted data. Reset clears the TXINV bit.
This read/write bit determines whether SCI characters are eight or nine bits long. (See
The ninth bit can serve as an extra stop bit, as a receiver wakeup signal, or as a parity bit. Reset clears
the M bit.
1 = Loop mode enabled
0 = Normal operation enabled
1 = SCI enabled
0 = SCI disabled
1 = Transmitter output inverted
0 = Transmitter output not inverted
1 = 9-bit SCI characters
0 = 8-bit SCI characters
Enables loop mode operation
Enables the SCI
Controls output polarity
Controls character length
Controls SCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
Address:
Setting the TXINV bit inverts all transmitted values, including idle, break,
start, and stop bits.
Reset:
Read:
Write:
LOOPS
$0013
Bit 7
0
Figure 11-9. SCI Control Register 1 (SCC1)
ENSCI
6
0
MC68HC908AP Family Data Sheet, Rev. 4
TXINV
5
0
NOTE
M
4
0
WAKE
3
0
ILTY
2
0
PEN
1
0
Bit 0
PTY
0
Table
I/O Registers
11-5.)
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