FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 199

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130
PDATA<7:0>
NAME
nAUTOFD
t1
t2
t3
t4
t5
t6
BUSY
received. ECP can stall by keeping nAUTOFD low.
ns.
PDATA Valid to nACK Asserted
nAUTOFD Deasserted to PDATA Changed
nACK Asserted to nAUTOFD Deasserted
(Notes 1,2)
nACK Deasserted to nAUTOFD Asserted (Note 2)
nAUTOFD Asserted to nACK Asserted
nAUTOFD Deasserted to nACK Deasserted
FIGURE 22 - ECP PARALLEL PORT FORWARD TIMING
DESCRIPTION
t6
t2
t1
t7
199
t5
t8
MIN
t6
80
80
0
0
0
0
TYP
t3
t4
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns