FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 124

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
CPU-to-Host Communication
The FDC37C93x CPU can write to the Output
Host-to-CPU Communication
The host system can send both commands and
data to the Input Data register.
differentiates between commands and data by
reading the value of Bit 3 of the Status register.
When bit 3 is "1", the CPU interprets the register
contents as a command. When bit 3 is "0", the
CPU interprets the register contents as data.
During a host write operation, bit 3 is set to "1" if
SA2 = 1 or reset to "0" if SA2 = 0.
KIRQ
If "EN FLAGS" has been executed and P24 is
set to a one: the OBF flag is gated onto KIRQ.
The KIRQ signal can be connected to system
interrupt to signify that the FDC37C93x CPU
has written to the output data register via "OUT
DBB,A". If P24 is set to a zero, KIRQ is forced
low. On power-up, after a valid RST pulse has
been delivered to the device, KIRQ is reset to 0.
KIRQ will normally reflects the status of writes
"DBB". (KIRQ is normally selected as IRQ1 for
keyboard support.)
If "ENFLAGS has not been executed: KIRQ can
be controlled by writing to P24. Writing a zero
to P24 forces KIRQ low; a high forces KIRQ
high.
MIRQ
If "EN FLAGS" has been executed and P25 is
set to a one:; IBF is inverted and gated onto
MIRQ. The MIRQ signal can be connected to
system interrupt to signify that the FDC37C93x
CPU has read the DBB register.
OUT DBB
8042 INSTRUCTION
Set OBF, and, if enabled, the KIRQ output signal goes high
Table 53 - Host Interface Flags
The CPU
124
register automatically sets Bit 0 (OBF) in the
Status register. See Table 53.
If "ENFLAGS has not been executed, MIRQ is
controlled by P25, Writing a zero to P25 forces
MIRQ low, a high forces MIRQ high. (MIRQ is
normally selected as IRQ12 for mouse support.)
Gate A20
A general purpose P21 can be routed out to the
general purpose pin GP25 for use as a software
controlled Gate A20 or user defined output.
EXTERNAL
INTERFACE
Industry-standard PC-AT-compatible keyboards
employ a two-wire, bidirectional TTL interface
for data transmission.
supply PS/2 mouse products that employ the
same type of interface.
expansion, the FDC37C93x provides four signal
pins that may be used to implement this
interface directly for an external keyboard and
mouse.
The FDC37C93x has four high-drive, open-drain
output, bidirectional port pins that can be used
for external serial interfaces, such as ISA
external
interfaces. They are KCLK, KDAT, MCLK, and
MDAT.
P26 is inverted and output as KCLK. The KCLK
pin is connected to TEST0. P27 is inverted and
output as KDAT. The KDAT pin is connected to
P10. P23 is inverted and output as MCLK. The
MCLK pin is connected to TEST1.
inverted and output as MDAT. The MDAT pin is
FLAG
keyboard
KEYBOARD
and
Several sources also
To facilitate system
PS/2-type
AND
MOUSE
P22 is
mouse

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