FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 146

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Note 1: A logical device will be active and powered up according to the following equation:
Note2: The IDE/FDC split register, normally found at either 0x3F7 or 0x377 is now an FDC support
Interrupt Select
Defaults :
0x70 = 0x00,
0x72 = 0x00,
DMA Channel Select
Default = 0x04
32-Bit Memory Space
Configuration
Logical Device
Logical Device Config.
Reserved
LOGICAL DEVICE
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
nHDCS0# = IDE TASK BASE + [7:0]
nHDCS1# = IDE MISC AT BASE + 0 (typically located at 0x3F6 or 0x376)
REGISTER
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or
clearing one sets or clears the other. If the I/O Base Addr of the logical device is not within
the Base I/O range as shown in the Logical Device I/O map, then read or write is not valid
and is ignored.
only register. The IDE logical Device will now support only a status register (typically found
at 0x3F6 or 0x376). The IDE Decoder operates as follows :
(0xA9-0xDF)
(0xE0-0xFE)
(0x76-0xA8)
(0x71,0x73)
(0x74,0x75)
ADDRESS
(0x70,072)
0xFF
Table 63 - Logical Device Registers
0x70 is implemented for each logical device.
description.
uses Interrupt Select register 0x72. Unused
register (0x72) will ignore writes and return
zero when read. Interrupts default to edge
high (ISA compatible).
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Only 0x74 is implemented for FDC , and
Parallel port. 0x75 is not implemented and
ignores writes and returns zero when read.
Refer to DMA Channel Configuration.
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Reserved - Vendor Defined (see SMSC
defined
Registers)
Reserved
Refer to Interrupt Configuration Register
146
Logical
Only the keyboard controller
DESCRIPTION
Device
Configuration
STATE
C
C
C
C
C