FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 127

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
REAL TIME CLOCK
The Real Time Clock is a complete time of day
clock with alarm and one hundred year
calendar, a programmable periodic interrupt,
and a programmable square wave generator.
FEATURES
PORT DEFINITION AND DESCRIPTION
OSC
Crystal Oscillator input.
frequency is 32.768 KHz.
RTC Reset
The clock, calendar, or RAM functions are not
affected
Counts seconds, minutes, and hours of the
day.
Counts days of the week, date, month and
year.
Binary or BCD representation of time,
calendar and alarm.
Three interrupts -
software maskable. (No daylight savings
time!)
by
the
each is separately
Maximum
system
clock
reset
127
(RESET_DRV active). When the RESET_DRV
pin is active (i.e., system reset) and the battery
voltage is above 1 volt nominal, the following
occurs:
1
2
3
4
5
6
7
8
9
When RESET_DRV is active and the battery
voltage is below 1 volt nominal, the following
occurs:
1
2
Periodic Interrupt Enable (PIE) is cleared to
0.
Alarm Interrupt Enable (AIE) bit is cleared
to 0.
Update ended Interrupt Enable (UIE) bit is
cleared to 0.
Update ended Interrupt Flag (UF) bit is
cleared to 0.
Interrupt Request status Flag (IRQF) bit is
cleared to 0.
Periodic Interrupt Flag (PIF) is cleared to 0.
The RTC and CMOS registers are not
accessable.
Alarm Interrupt Flag (AF) is cleared to 0.
nIRQ pin is in high impedance state.
Registers 00-0D are initialized to 00h.
Access to all registers from the host or
FDC37C93x CPU (8042) are blocked.

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