FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 118

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

generate an interrupt on the rising edge of the
Time-out status bit.
mapped to an interrupt channel through the
WDT_CFG Configuration Register.
mapped to an interrupt the interrupt request pin
reflects the value of the WDT time-out status bit.
When the polarity bit is 0, GP12 reflect the value
of the Watch Dog Time-out status bit, however
when the polarity bit is 1, GP12 reflects the
inverted value of the Watch Dog Time-out status
bit.
The host may force a Watch Dog time-out to
occur by writting a "1" to bit 2 of the WDT_CTRL
(Force WD Time-out) Configuration Register.
Writting a "1" to this bit forces the WDT count
value to zero and sets bit 0 of the WDT_CTRL
(Watch Dog Status). Bit 2 of the WDT_CTRL is
self-clearing.
POWER LED TOGGLE
WDT_CTRL BIT[1]
1
0
0
0
The WDT interrupt is
TOGGLE ON WDT
WDT_CFG BIT[3]
POWER LED
Table 50 - LED Toggle Truth Table
X
0
1
1
When
118
WDT T/O STATUS BIT
Power LED Toggle
Setting bit 1 of the WDT_CTRL configuration
register will cause the Power LED output driver
to toggle at 1 Hertz with a 50 percent duty cycle.
will drive continuously unless it has been
configured to toggle on Watch Dog time-out
conditions.
configuration register will cause the Power LED
output driver to toggle at 1 Hertz with a 50
percent duty cycle whenever the WDT time-out
status bit is set. The truth table below clarifies
the conditions for which the Power LED will
toggle.
When the polarity bit is 0, the Power LED output
asserts or drives low. If the polarity bit is 1 then
the Power LED output asserts or drives high.
WDT_CTRL BIT[0]
When this bit is cleared the Power LED output
X
X
0
1
Setting bit 3 of the WDT_CFG
Toggle
Continuous
Continuous
Toggle
POWER LED STATE