SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 539

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

MMIO_BASE
MMIO_BASE updates
MPEG bitstream
MPEG-1 macroblock header
MPEG-1 macroblock header,output format
MPEG-1 standard references
MPEG-2 macroblock header
MPEG-2 macroblock header,output format
MPEG-2 standard
multi-tap FIR filtering
N
New features
non cacheable region
noncachable region
non-interlaced scan
non-maskable interrupt
nop
NTSC
O
offset byte in set
operation ordering,special
operations
order,miss processing
ordering
Ordering Information
ordering,special operation
output formats
output grid
output scaling
overlap configuration of windows
overlay
A B C
VO_YTHR
VO_YUF
description table
PCI interface MMIO register
PCI interface register
picture
references
A-140
DSPCPU A-1,
memory operations
ICP
relating to input grid
calculation
7-23
field description table
picture
picture
field description table
table
14-5
11-10
1-1
D
15-3
14-8
5-8
15-1
7-15
7-15
E
A-2
5-3
7-6
1-10
14-6
5-13
5-5
11-10
5-9
3-10
F G
5-7
14-7
5-7
5-7
11-7
15-3
15-3
15-3
7-19
7-19
14-1
H
11-9
I
15-4
15-2
J
K
L M N O P Q R S T U V W X Y Z
overlay formats
overlay image
overlay, image 14-5,
overlays
oversampling A/D converter
P
pack16lsb
pack16msb
package outline
package,BGA package
packbytes
PAL
parameter table
parameter tables
Part Number
partial words
PCI
PCI aperture
PCI configuration space
PCI header
PCI interface
PRELIMINARY SPECIFICATION
blending
of image
of ICP
computer generated
ICP horizontal filter
horizontal filter to RGB
ICP
vertical filter
aperture
output block timing
space
characteristics overview
concurrency
configuration header
configuration operations
configuration registers
DMA operations
I/O operations
initiator
limitations
ordering
priorities
registers
7-23
14-22
base addresses
built-in self test
cache line size
class code
command
A-141
A-143
11-2
14-5
11-3
A-142
11-2
1-10
5-4
5-5
11-3
11-2
14-9
11-3
14-1
14-9
fields
11-17
1-10
14-24
11-3
11-2
14-9
11-6
11-2
11-5
1-10
14-16
11-3
14-23
11-7
14-9
11-7
11-3
11-7
11-3
14-26
8-2
11-1
11-2
Index-13