SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 472
![Video ICs ADV DGTL VIDEO DECODR](/photos/27/77/277797/qfp100_sml.jpg)
SAA7115HLBE
Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7115HLBE.pdf
(548 pages)
Specifications of SAA7115HLBE
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
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Philips Semiconductors
Unsigned sum of products of unsigned bytes
SYNTAX
FUNCTION
DESCRIPTION
bytes of rsrc1 and rsrc2; the four products are summed, and the result is written to rdest. All values are considered
unsigned. All computations are performed without loss of precision.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r70 = 0x0afb14f6, r30 = 0x0a0a1414
r10 = 0, r70 = 0x0afb14f6, r30 = 0x0a0a1414
r20 = 1, r80 = 0x649c649c, r40 = 0x9c649c64
r50 = 0x80808080, r60 = 0xffffffff
As shown below, the
The
[ IF rguard ] ufir8uu rsrc1 rsrc2 → rdest
if rguard then
rsrc1
rdest ← zero_ext8to32(rsrc1<31:24>) × zero_ext8to32(rsrc2<31:24>) +
ufir8uu
31
unsigned
zero_ext8to32(rsrc1<23:16>) × zero_ext8to32(rsrc2<23:16>) +
zero_ext8to32(rsrc1<15:8>) × zero_ext8to32(rsrc2<15:8>) +
zero_ext8to32(rsrc1<7:0>) × zero_ext8to32(rsrc2<7:0>)
Initial Values
23
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
unsigned
ufir8uu
15
unsigned
rdest
operation computes four separate products of the four pairs of corresponding 8-bit
31
7
unsigned
ufir8uu r70 r30 → r90
IF r10 ufir8uu r70 r30 → r100
IF r20 ufir8uu r80 r40 → r110
ufir8uu r50 r60 → r120
0
unsigned
Operation
PRELIMINARY SPECIFICATION
rsrc2
31
unsigned
PNX1300/01/02/11 DSPCPU Operations
×
23
unsigned
0
×
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ifir8ui ifir8ii ifir16
r90 ← 0x1efa
no change, since guard is false
r110 ← 0xf3c0
r120 ← 0x1fe00
+
15
unsigned
ATTRIBUTES
×
SEE ALSO
ufir16
Result
7
ufir8uu
unsigned
×
dspmul
2, 3
No
90
—
0
2
3
A-174
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