SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 508
![Video ICs ADV DGTL VIDEO DECODR](/photos/27/77/277797/qfp100_sml.jpg)
SAA7115HLBE
Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7115HLBE.pdf
(548 pages)
Specifications of SAA7115HLBE
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
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Philips Semiconductors
Zero extend 8 bits
pseudo-op for ubytesel
SYNTAX
FUNCTION
DESCRIPTION
contains 0) as the first argument and rsrc1 as the second. (Note: pseudo operations cannot be used in assembly
source files.)
writes the result in rdest.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0xffff0040
r10 = 0, r40 = 0xff0fff91
r20 = 1, r40 = 0xff0fff91
r50 = 0x00000091
The
As shown below, the
The
[ IF rguard ] zex8 rsrc1 → rdest
if rguard then
rdest ← zero_ext8to32(rsrc1<7:0>)
zex8
zex8
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation is a pseudo operation transformed by the scheduler into a
zex8
operation zero extends the least-significant byte of the argument, rsrc1, to 32 bits and
rsrc1
rdest
31
31
zex8 r30 → r60
IF r10 zex8 r40 → r70
IF r20 zex8 r40 → r100
zex8 r50 → r110
0
0
0
0
0
0
0
0
0
0
0
0
Operation
0
0
0
0
0
0
PRELIMINARY SPECIFICATION
0
0
0
0
0
0
PNX1300/01/02/11 DSPCPU Operations
7
7
unsigned
unsigned
r60 ← 0x00000040
no change, since guard is false
r100 ← 0x00000091
r110 ← 0x00000091
0
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ubytesel sex16 sex8 zex16
ubytesel
ATTRIBUTES
SEE ALSO
Result
with r0 (always
1, 2, 3, 4, 5
zex8
alu
No
55
—
1
1
A-210
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