SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 101
![Video ICs ADV DGTL VIDEO DECODR](/photos/27/77/277797/qfp100_sml.jpg)
SAA7115HLBE
Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7115HLBE.pdf
(548 pages)
Specifications of SAA7115HLBE
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
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Philips Semiconductors
Figure 6-6. Chrominance re-sampling to achieve interspersed sampling.
Figure 6-7. Filtering at the edge of the active area.
Figure 6-8. Format of CCIR656 SAV and EAV timing reference codes.
Figure 6-9. VI capture parameters.
VI_CTL.SC=1: ‘Interspersed sampling’ serves to gen-
erate a sampling structure in memory where chromi-
nance samples are spatially midway between luminance
samples, as shown in
mat is suitable for use in MPEG-1 encoding.
The VI hardware applies a (–1 13 5 –1)/16 filter as illus-
trated in
writing them to memory. This filter computes chromi-
nance values at sample points midway between lumi-
nance samples
Figure 6-6
1
1 1 1 1 1 1 1 1
. Computed video data is clamped to
d
to the chrominance samples before
c
Figure
YUV 4:2:2 CCIR656
b
Resampled sample
a
input samples
6-6. This ‘interspersed’ for-
b
c
values
d
0 0 0 0 0 0 0 0
Timing reference code
Pixel 0
START_X
e
a
a
f
Preamble
b
b
g
c
c
h
START_Y
Captured Image
d
d
i
e
e
WIDTH
Active area
j
f
f
• • •
0 0 0 0 0 0 0 0
g
g
V = 1 during field blanking
01h if the filter result is less than 01h and clamped to FFh
if greater than FFh. Interspersed data format is preferred
by some video compression standards. The MPEG-1
standard, for example, requires YUV 4:2:0 data with
chrominance sampling positions horizontally and verti-
cally midway between luminance samples. This can be
achieved from the horizontally interspersed sampling for-
PRELIMINARY SPECIFICATION
1.
h
h
F = 0 during field 1
F = 1 during field 2
Pixel M–1
zs zt
i
i
All filters perform full precision intermediate computa-
tions and saturation upon generating the result bits.
V = 0 elsewhere
j
j
Line 0
Line N–1
zu zv zw zx zy zz zy zx zw
Y
V
U
g
k
k
ef
ef
'
=
=
=
Y
l
l
(
(
g
–
–
U
V
c
c
+
+
1 F V H P P P P
13U
13V
e
e
+
+
5U
5V
g
g
–
–
U
V
i
i
) 16
H = 0 for SAV
H = 1 for EAV
) 16
⁄
⁄
Protection bits
(error correction)
Video In
6-5
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