SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 515
![Video ICs ADV DGTL VIDEO DECODR](/photos/27/77/277797/qfp100_sml.jpg)
SAA7115HLBE
Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7115HLBE.pdf
(548 pages)
Specifications of SAA7115HLBE
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
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Philips Semiconductors
ICP_MPC
ICP_MIR
ICP_DP
ICP_DR
ICP_SR
VLD_COMMAND
VLD_SR
VLD_QS
VLD_PI
VLD_STATUS
VLD_IMASK
VLD_CTL
VLD_BIT_ADR
VLD_BIT_CNT
VLD_MBH_ADR
VLD_MBH_CNT
VLD_RL_ADR
VLD_RL_CNT
IIC_AR
IIC_DR
IIC_STATUS
IIC_CTL
SSI_CTL
SSI_CSR
SSI_TXDR
SSI_RXDR
SSI_RXACK
SEM
MMIO Register Name
10 280C
10 281C
10 282C
10 340C
10 2C00
10 2C04
10 2C10
10 2C20
10 2C24
10 2400
10 2404
10 2408
10 2410
10 2414
10 2800
10 2804
10 2808
10 2810
10 2814
10 2818
10 2820
10 2824
10 2828
10 2830
10 3400
10 3404
10 3408
10 0500
(in hex)
Offset
DSPCPU
—/W
—/W
R/W
R/W
R/W
R/W
R/W
R/W
R/—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/—
R/W
R/W
R/W
R/—
R/W
Accessibility
Synchronous Serial Interface
VLD Co-Processor
Initiators
External
I
SEM Device
2
C Interface
—/W
—/W
R/W
R/W
R/W
R/W
R/W
R/W
R/—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/—
R/W
R/W
R/W
R/—
R/W
PCI
PRELIMINARY SPECIFICATION
MicroProgram Counter
Micro Instruction Register
Data Pointer
Data Register
Status Register
Next action to be taken by VLD
Bitstream shift register
Quantization Scale Code
Picture layer Information
Status Register
Controls which status bits causes VLD interrupts
Control Register
Current Bitstream Read Address
Bitstream remaining byte count
Macro Block Header output address
Macro Block Header output remaining count
Run/Length output address
Run/Length output remaining count
Address, Byte count and Direction
Data Register
Status Register
Control Register
Control Register
Additional Control and Status register
Transmit Data Register
Receive Data Register
Write a ‘1’ here to ACK read of Receive Data Register
Simple multi-processor semaphore
Description
MMIO Register Summary
B-5
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