IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 189

MegaCore Suite W/ 17 DSP Video/image Processing Functions

IPS-VIDEO

Manufacturer Part Number
IPS-VIDEO
Description
MegaCore Suite W/ 17 DSP Video/image Processing Functions
Manufacturer
Altera
Type
-r
Datasheets

Specifications of IPS-VIDEO

Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
Suite of IP Functions for Video and Image Processing
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Chapter 6: Signals
Switch
Table 6–18. Scaler II Signals (Part 2 of 2)
Switch
Table 6–19. Switch Signals (Part 1 of 2)
May 2011 Altera Corporation
dout_valid
Note to
(1) These ports are not present if you turn off Enable run-time control of input/output frame size and select Bilinear for Scaling algorithm in the
clock
reset
alpha_in_N_data
alpha_in_N_endofpacket
alpha_in_N_ready
alpha_in_N_startofpacket
alpha_in_N_valid
alpha_out_N_data
alpha_out_N_endofpacket
alpha_out_N_ready
alpha_out_N_startofpacket
alpha_out_N_valid
din_N_data
din_N_endofpacket
din_N_ready
din_N_startofpacket
parameter editor.
Table 6–18
Signal
Signal
Table 6–19
Direction
Out
shows the input and output signals for the Switch MegaCore function.
Direction
In
In
In
In
Out
In
In
Out
Out
In
Out
Out
In
In
Out
In
dout port Avalon-ST valid signal. This signal is asserted when the
MegaCore function outputs data.
The main system clock. The MegaCore function operates on the rising
edge of the clock signal.
The MegaCore function asynchronously resets when you assert reset.
You must deassert reset synchronously to the rising edge of the
clock signal.
alpha_in_N port Avalon-ST data bus. This bus enables the transfer of
pixel data into the MegaCore function.
alpha_in_N port Avalon-ST endofpacket signal. This signal marks
the end of an Avalon-ST packet.
alpha_in_N port Avalon-ST ready signal. This signal indicates when
the MegaCore function is ready to receive data.
alpha_in_N port Avalon-ST startofpacket signal. This signal marks
the start of an Avalon-ST packet.
alpha_in_N port Avalon-ST valid signal. This signal identifies the
cycles when the port should input data.
alpha_out_N port Avalon-ST data bus. This bus enables the transfer
of pixel data out of the MegaCore function.
alpha_out_N port Avalon-ST endofpacket signal. This signal marks
the end of an Avalon-ST packet.
alpha_out_N port Avalon-ST ready signal. The downstream device
asserts this signal when it is able to receive data.
alpha_out_N port Avalon-ST startofpacket signal. This signal
marks the start of an Avalon-ST packet.
alpha_out_N port Avalon-ST valid signal. This signal is asserted
when the MegaCore function outputs data.
din_N port Avalon-ST data bus. This bus enables the transfer of pixel
data into the MegaCore function.
din_N port Avalon-ST endofpacket signal. This signal marks the end
of an Avalon-ST packet.
din_N port Avalon-ST ready signal. This signal indicates when the
MegaCore function is ready to receive data.
din_N port Avalon-ST startofpacket signal. This signal marks the
start of an Avalon-ST packet.
Description
Description
(1)
(1)
(1)
Video and Image Processing Suite User Guide
(1)
(1)
(1)
(1)
(1)
(1)
(1)
6–25

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