IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 180
IPS-VIDEO
Manufacturer Part Number
IPS-VIDEO
Description
MegaCore Suite W/ 17 DSP Video/image Processing Functions
Manufacturer
Altera
Type
-r
Specifications of IPS-VIDEO
Software Application
IP CORE, SUITES
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
Suite of IP Functions for Video and Image Processing
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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6–16
Table 6–12. Deinterlacer II Signals (Part 3 of 4)
Video and Image Processing Suite User Guide
ma_read_master_address
ma_read_master_read
ma_read_master_burstcount
ma_read_master_readdata
ma_read_master_readdatavalid
ma_read_master_waitrequest
motion_read_master_address
motion_read_master_read
motion_read_master_burstcount
motion_read_master_readdata
motion_read_master_readdatavalid
motion_read_master_waitrequest
write_master_address
write_master_write
write_master_burstcount
write_master_writedata
Signal
Direction
Out
Out
Out
In
In
In
Out
Out
Out
In
In
In
Out
Out
Out
Out
ma_read_master port Avalon-MM address bus. This bus
specifies a byte address in the Avalon-MM address
space.
ma_read_master port Avalon-MM read signal. The
MegaCore function asserts this signal to indicate read
requests from the master to the system interconnect
fabric.
ma_read_master port Avalon-MM burstcount signal.
This signal specifies the number of transfers in each
burst.
ma_read_master port Avalon-MM readdata bus. These
input lines carry data for read transfers.
ma_read_master port Avalon-MM readdatavalid
signal. The system interconnect fabric asserts this signal
when the requested read data has arrived.
ma_read_master port Avalon-MM waitrequest signal.
The system interconnect fabric asserts this signal to cause
the master port to wait.
motion_read_master port Avalon-MM address bus.
This bus specifies a byte address in the Avalon-MM
address space.
motion_read_master port Avalon-MM read signal. The
MegaCore function asserts this signal to indicate read
requests from the master to the system interconnect
fabric.
motion_read_master port Avalon-MM burstcount
signal. This signal specifies the number of transfers in each
burst.
motion_read_master port Avalon-MM readdata bus.
These input lines carry data for read transfers.
motion_read_master port Avalon-MM readdatavalid
signal. The system interconnect fabric asserts this signal
when requested read data has arrived.
motion_read_master port Avalon-MM waitrequest
signal.The system interconnect fabric asserts this signal to
cause the master port to wait.
write_master port Avalon-MM address bus. This bus
specifies a byte address in the Avalon-MM address space.
write_master port Avalon-MM write signal. The
MegaCore function asserts this signal to indicate write
requests from the master to the system interconnect fabric.
write_master port Avalon-MM burstcount signal. This
signal specifies the number of transfers in each burst.
write_master port Avalon-MM writedata bus. These
output lines carry data for write transfers.
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Description
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May 2011 Altera Corporation
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Chapter 6: Signals
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Deinterlacer II
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