IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 141

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 5: Functional Descriptions
Scaler
May 2011 Altera Corporation
Algorithmic Description
This section describes how the algorithmic operations of the bilinear scaler can be
modeled using a frame-based method. This does not reflect the implementation, but
allows the calculations to be presented concisely. To find a value for an output pixel
located at (i, j), we first calculate the corresponding location on the input:
The integer solutions,(in
left corner of the four input pixels to be summed. The differences between in
(in
real-valued position that we want to read from. Call these errors err
precision of each error variable is determined by the number of fraction bits chosen by
the user, B
Their values can be calculated as:
in
in
where % is the modulus operator and max(a, b) is a function that returns the
maximum of two values.
i
û, in
i
j
= (i × w
= (j × h
j
û) are a measure of the error in how far the top-left input pixel is from the
fh
and B
in
in
)/h
)/w
out
fv
out
, respectively.
i
û, in
err
err
j
û) to these equations provide the location of the top-
i
j
=
=

---------------------------------------------------------- -

------------------------------------------------------- -


i w
j h


max w
max h
in
in

%w
%h

in
in


out
out
w
h
out
out
 2
 2




Video and Image Processing Suite User Guide
B
B
fv
fh
i
and err
j
. The
i
, in
j
and
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