IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 131

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 5: Functional Descriptions
Deinterlacer II
Deinterlacer II
May 2011 Altera Corporation
The features and functionality of the Deinterlacer II MegaCore function are largely
similar to those of the
support bob and weave methods but it can convert interlaced video to progressive
video using two high quality motion-adaptive methods. The standard
motion-adaptive algorithm is largely similar to the Deinterlacer MegaCore function
motion-adaptive implementation. The high quality motion-adaptive algorithm uses a
kernel of pixels and significantly enhances the edge-adaptive reconstruction to
improve image quality.
The Deinterlacer II also uses a different frame buffering method. The Deinterlacer II
stores the input video fields in the external memory and concurrently uses these input
video fields to construct deinterlaced frames.
Figure 5–24
Figure 5–24. Deinterlacer II Block Diagram
Note to
(1) There can be one or two Avalon-MM masters connected to the Memory Reader.
This buffering method provides the following features:
■
■
■
The Deinterlacer II has a latency of only a few of lines, compared to the
Deinterlacer that has a latency of a field.
The Deinterlacer II requires less memory bandwidth. In normal operating mode,
the Deinterlacer II writes incoming input fields into the memory and only fetches
the three preceding fields to build the progressive output frame. The simple
motion-adaptive algorithm in the Deinterlacer requires four fields to build the
progressive output frame. Additionally, the Deinterlacer II does not use external
memory when propagating progressive frames.
The Deinterlacer II does not provide double and triple-buffering, and does not
support the user-defined frame rate conversion feature offered in the Deinterlacer.
Avalon-ST Input
Figure
Avalon-MM Master
5–24:
(din)
shows a top-level block diagram of the Deinterlacer II frame buffering.
(write_master)
Memory
Writer
Deinterlacer
Arbitration Logic
SDRAM
DDR2
MegaCore function. The Deinterlacer II does not
Memory
Reader
Avalon-MM Master
(read_master)
Video and Image Processing Suite User Guide
Deinterlacing
Algorithm
Avalon-ST Output
(dout)
5–47